CodeWarrior for 56800/E Digital Signal Controllers

Full Product, Software and 1 Year Support, Nodelock License
The comprehensive, award-winning, highly visual CodeWarrior development environment lets both 56800 and 56800E developers build and deploy even the most sophisticated systems quickly and easily by integrating support for both architectures into a single integrated product offering and includes Processor Expert (Rapid Application Development tool) support for all released processors. This version supports 56F80x/2x, 56F85x, 56F81xx, 56F83xx, 56F801x, and 56F802x/3x Digital Signal Controllers.

CodeWarrior for 56800/E Digital Signal Controllers Features

• 56800/E assembly language
• Optimizing ANSI C compiler
• GUI based with command line option
• Advanced optimization technology generates fast, compact, high quality code
• ELF output in Compiler/Assembler
• Linker generates both ELF and S-Records
• MSL supports File IO through debugger interface
• Complete control of source files, libraries and dependencies to reduce project complexity
• Automatic dependency management to eliminate the need for complicated makefiles
• Multi-threading support to allow you to work on one project while building another
• Built-in "stationery" templates help you create new projects faster
  • Stationery/Example support for 56F8037, 56F8025, 56F8036, 56F8023
• Pop-up menus for easy project navigation to improve your productivity
• Built-in drag-and-drop support makes source code editing a snap
• Special tools and shortcuts to help you organize your code and set custom markers
• Graphical display of complex data structures and expressions to speed runtime analysis
• Precise breakpoints help solve sophisticated problems
• Processor Expert(R) support for 56F8037, 56F8025, 56F8036, 56F8023
• Fast 32-bit division & reminder routines in runtime support are used by code-generator
  • added MPY+ADD=MAC peephole pattern
• Software pipelining - Software pipelining is a loop transformation that changes the initial loop so that parts of different iterations execute at the same time. This scheduling technique exploits architectural instruction level parallelism. It may also produce better loop schedules when stalls, hazards or latencies exist between instructions in initial loop if these can be avoided in the transformed loop. Stack Sequence Optimization
• CRC linker feature - CRC linker feature is designed to allow execution of memory integrity checks at runtime over user defined portions of memory, which can identify unexpected memory writes (caused by coding errors, unexpected writes, etc.) Interprocedural Analysis support- Interprocedural Analysis (IPA) allows the compiler to generate better and/or smaller code by inspecting more than just one function or data object at the same time (this technology is currently mostly used by the inliner).