Freescale’s next-generation PowerQUICC™ III integrated communications processors are designed to provide solutions for symmetrical and asymmetrical multi-core systems. Based on the scalable e500 processor and system-on-chip (SoC) platform, they deliver dual-core gigahertz plus processing performance with advanced content processing and security features.

The MPC8572 family of processors is designed to offer clock speeds from 1.2 GHz up to 1.5 GHz, combining two powerful e500 processor cores built on Power Architecture™ technology, enhanced peripherals, and high-speed interconnect technology to balance processor performance with I/O system throughput. These processors also contain an application acceleration blocks: a table lookup unit (TLU) that offloads complex table searches and header inspections; a pattern-matching engine to handle regular expression matching with a deflate engine to manage file decompression; and a security engine that accelerates crypto operations in IPSec and SSL/TLS for virtual private networks.

Based on Freescale’s 90 nm silicon-on-insulator (SOI) copper interconnect process technology, the MPC8572 is designed to deliver higher performance with lower power dissipation. The MPC8572 processors provide a significant performance increase and represent the next step in continuous innovation from the popular PowerQUICC family. With uncompromising integration, the MPC8572 platform builds on the embedded core performance of Power Architecture technology and adds new features to enhance traffic management and security acceleration.

Support for high-speed interfaces on the MPC8572 enables scalable connectivity to network processors and/or ASICs in the data plane while the MPC8572 platform handles complex, computationally demanding control plane processing tasks. These processors also include dual next-generation double data rate (DDR2/DDR3) memory controllers, enhanced Gigabit Ethernet support, and double precision floating point.

Features

• Dual e500 Power Architecture cores scaling to 1.5 GHz
• 1MB L2 cache/SRAM with I/O stashing
• 32kB I/D L1 cache per core
• Dual integrated DDR2/DDR3 SDRAM memory controllers
  • 64b (72b with ECC) per controller
  • to 800 MHz datarate
• Four integrated Ethernet controllers (enhanced TSEC)
  • 10/100/1000 support
  • TCP/UPD offload
  • Quality of service support
  • IEEE® 1588 support
  • Lossless flow control
  • SGMII interfaces
• Single 10/100 Fast Ethernet controller (FEC) with MII (muxed)
• Table Lookup Unit offloading complex table searches
• Pattern Matching Engine searches for regular expressions within packet payloads
  • Includes packet deflate engine to expose zipped payloads
• Security engine
  • DES, 3DES, MD-5, SHA-1/2, AES, RSA, RNG, Kasumi F8/F9 and ARC-4 encryption algorithms
• PCI Express®
• Serial RapidIO®
• 32b local bus running up to 133 MHz
• Dual I2C, Dual DMA, DUART, Multiprocessor Interrupt Controller, IEEE1149.1 JTAG test access port
• 1023-pin FC-PBGA package

Target Markets

Use a dual core device for higher performance with symmetric multiprocessor (SMP); to collapse two non-SMP operation systems (either homogenous or heterogeneous) onto one device; for split control and data plane applications; for adding services/applications on Linux next to an existing OS; for later in-field upgrade to higher performance by turning on the second core; for in-field “hot swap” OS upgrade by loading new OS to second core before putting first core with old OS into sleep mode.

• Networking (switches and routers)
  • Linecard controller
  • Linecard control plane
  • Linecard combined control and data plane
  • Shelf controller
  • Centralized processing resource
  • AMC card
  • Controller on ATCA Carrier Card
  • Control card for NodeB, BTS, WCDMA, 4G LTE, WiMax
  • General purpose compute blade
• Telecom
  
• Industrial
  • Robotics
  • Test/measurement Networking/telecom
  • Single board computers
  • Military/industrial applications

Data Sheet

MPC8572E

MPC8548 PowerQUICC III Processors

MPC8544E PowerQUICC III