• ±1 LSB INL; no missing codes
• Programmable throughput up to 200 ksps
• Up to 24 external inputs
• Data dependent windowed interrupt generator
• Built-in temperature sensor (±3 °C)
• Two 12-Bit Current Mode DACs

• Programmable hysteresis and response time
• Configurable as wake-up or reset source

• On-chip debug circuitry facilitates full-speed, non-
• intrusive in-system debug (No emulator required)
• Provides breakpoints, single stepping
• Inspect/modify memory and registers
• Complete development kit

• Built-in LDO regulator: 2.1 or 2.5 V

• Pipelined instruction architecture; executes 70% of
• instructions in 1 or 2 system clocks
• Up to 50 MIPS throughput with
• 50 MHz system clock
• Expanded interrupt handler

• 2304 bytes internal data RAM (256 + 2048)
• 32/16 kB Flash; In-system programmable in
• 512 byte sectors
• 64 bytes battery-backed RAM (smaRTClock)

• 24 port I/O; push-pull or open-drain, up to 5.25 V tolerance
• Hardware SMBus™ (I2C™ Compatible), SPI™, and UART serial ports available concurrently
• Four general purpose 16-bit counter/timers
• Programmable 16-bit counter/timer array with six capture/compare modules, WDT
• Hardware smaRTClock operates down to 1 V with 64 bytes battery-backed RAM and backup voltage regulator

• Internal oscillators: 24.5 MHz 2% accuracy supports UART operation; clock multiplier up to 50 MHz
• External oscillator: Crystal, RC, C, or Clock (1 or 2 pin modes)
• smaRTClock oscillator: 32 kHz Crystal or self-resonant oscillator
• Can switch between clock sources on-the-fly

Data Sheet