• ± 1 LSB INL
• Programmable throughput up to 100 ksps
• Up to 8 external inputs; programmable as singleended
• or differential
• Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
• Data-dependent windowed interrupt generator
• Built-in temperature sensor

• Programmable throughput up to 500 ksps
• 8 external inputs (single-ended or differential)
• Programmable amplifier gain: 4, 2, 1, 0.5

• Can synchronize outputs to timers for jitter-free waveform generation

• On-chip debug circuitry facilitates full-speed, nonintrusive
• in-circuit/in-system debugging
• Provides breakpoints, single-stepping, watchpoints,
• stack monitor; inspect/modify memory and registers
• Superior performance to emulation systems using
• ICE-chips, target pods, and sockets
• IEEE1149.1 compliant boundary scan
• Complete development kit

• Temperature Range: –40 to +85 °C
• RoHS Available

• Pipelined instruction architecture; executes 70% of instruction set in 1 or 2 system clocks
• 100 MIPS or 50 MIPS throughput with on-chip PLL
• 2-cycle 16 x 16 MAC engine (C8051F120/1/2/3 and C8051F130/1/2/3 only)

• 8448 bytes internal data RAM (8 k + 256)
• 128 or 64 kB Banked Flash; in-system programmable
• in 1024-byte sectors
• External 64 kB data memory interface (programmable
• multiplexed or non-multiplexed modes)

• 8 byte-wide port I/O (100TQFP); 5 V tolerant
• 4 Byte-wide port I/O (64TQFP); 5 V tolerant
• Hardware SMBus™ (I2C™ Compatible), SPI™, and two UART serial ports available concurrently
• Programmable 16-bit counter/timer array with
• 6 capture/compare modules
• 5 general purpose 16-bit counter/timers
• Dedicated watchdog timer; bi-directional reset pin

• Internal precision oscillator: 24.5 MHz
• Flexible PLL technology
• External Oscillator: Crystal, RC, C, or clock

• Range: 2.7–3.6 V (50 MIPS) 3.0–3.6 V (100 MIPS)
• Power saving sleep and shutdown modes

Data Sheet

C8051F12x-13x

Lower the power consumption in your design!