The LM3S2533 microcontroller is based on the ARM Cortex-M3 controller core operating at 50 MHz, with 96 kB single-cycle flash, 64 kB single-cycle SRAM, CAN controller, Systick timer, four 32-bit or eight 16-bit general purpose timers, watchdog timer, SSI / SPI controller, I2C interfaces, 3 analog comparators, two UARTs, 10-bit analog-to-digital converter (ADC) with three input channels, six motion-control Pulse Width Modulation (PWM) outputs, battery-backed hibernation module with RTC, low drop-out voltage regulator, brown-out reset, power-on reset controller, and up to 48 GPIOs.
32-Bit RISC Performance
50-MHz operation with 32-bit ARM® Cortex™-M3 architecture
Thumb®-compatible Thumb-2-only instruction set, with hardware-division and single-cycle-multiplication