The LM3S6100 microcontroller is based on the ARM Cortex-M3 controller core operating at 25 MHz, with 64 kB single-cycle flash, 16 kB single-cycle SRAM, 10/100 Ethernet MAC/PHY, Systick timer, three 32-bit or six 16-bit general purpose timers, watchdog timer, SSI / SPI controller, one analog comparator, UART, low drop-out voltage regulator, brown-out reset, power-on reset controller, and up to 30 GPIOs.
32-Bit RISC Performance32-Bit RISC Performance
25-MHz operation with 32-bit ARM® Cortex™-M3 architecture
Thumb®-compatible Thumb-2-only instruction set, with hardware-division and single-cycle-multiplication