General description
The P89LPC933/934/935/936 is a single-chip microcontroller, available in low costpackages, based on a high performance processor architecture that executes instructionsin two to four clocks, six times the rate of standard 80C51 devices. Many system-levelfunctions have been incorporated into the P89LPC933/934/935/936 in order to reducecomponent count, board space, and system cost.
Features
Principal features
- 4 kB/8 kB/16 kB byte-erasable flash code memory organized into 1 kB/2 kB sectorsand 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatiledata storage.
- 256-byte RAM data memory. Both the P89LPC935 and P89LPC936 also include a512-byte auxiliary on-chip RAM.
- 512-byte customer data EEPROM on chip allows serialization of devices, storage ofsetup parameters, etc. (P89LPC935/936).
- Dual 4-input multiplexed 8-bit A/D converters/DAC outputs (P89LPC935/936, singleA/D on P89LPC933/934).Two analog comparators with selectable inputs andreference source.
- Two 16-bit counter/timers (each may be configured to toggle a port output upon timeroverflow or to become a PWM output) and a 23-bit system timer that can also be usedas an RTC.
- Enhanced UART with fractional baud rate generator, break detect, framing errordetection, and automatic address detection; 400 kHz byte-wide I2C-buscommunication port and SPI communication port.
- Capture/Compare Unit (CCU) provides PWM, input capture, and output comparefunctions (P89LPC935/936).
- High-accuracy internal RC oscillator option allows operation without external oscillatorcomponents.The RC oscillator option is selectable and fine tunable.
- 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up ordriven to 5.5 V).
- 28-pin TSSOP, PLCC, and HVQFN packages with 23 I/O pins minimum and up to 26I/O pins while using on-chip oscillator and reset options.
Additional features
- A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 nsfor all instructions except multiply and divide when executing at 18 MHz. This is sixtimes the performance of the standard 80C51 running at the same clock frequency. Alower clock frequency for the same performance results in power savings and reducedEMI.
- Serial flash In-Circuit Programming (ICP) allows simple production coding withcommercial EPROM programmers. Flash security bits prevent reading of sensitiveapplication programs.
- Serial flash In-System Programming (ISP) allows coding while the device is mountedin the end application.
- In-Application Programming (IAP) of the flash code memory. This allows changing thecode in a running application.
- Watchdog timer with separate on-chip oscillator, requiring no external components.The watchdog prescaler is selectable from eight values.
- Low voltage reset (brownout detect) allows a graceful system shutdown when powerfails. May optionally be configured as an interrupt.
- Idle and two different power-down reduced power modes. Improved wake-up fromPower-down mode (a LOW interrupt input starts execution). Typical power-downcurrent is 1 uA (total power-down with voltage comparators disabled).
- Active-LOW reset. On-chip power-on reset allows operation without external resetcomponents. A reset counter and reset glitch suppression circuitry prevent spuriousand incomplete resets. A software reset function is also available.
- Configurable on-chip oscillator with frequency range options selected by userprogrammed flash configuration bits. Oscillator options support frequencies from20 kHz to the maximum operating frequency of 18 MHz.
- Oscillator fail detect. The watchdog timer has a separate fully on-chip oscillatorallowing it to perform an oscillator fail detect function.
- Programmable port output configuration options: quasi-bidirectional, open drain,push-pull, input-only.
- Port ´input pattern match´ detect. Port 0 may generate an interrupt when the value ofthe pins match or do not match a programmable pattern.
- LED drive capability (20 mA) on all port pins. A maximum limit is specified for theentire chip.
- Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 nsminimum ramp times.
- Only power and ground connections are required to operate theP89LPC933/934/935/936 when internal reset option is selected.
- Four interrupt priority levels.
- Eight keypad interrupt inputs, plus two additional external interrupt inputs.
- Schmitt trigger port inputs.
- Second data pointer.
- Emulation support.
