The LM3S811 is based on the high-performance ARM® Cortex™-M3 v7M architecture optimized for small-footprint embedded applications. It is fully Thumb®-compatible with a Thumb-2-only instruction set and features hardware-division and single-cycle-multiplication. The integrated Nested Vectored Interrupt Controller (NVIC) provides deterministic interrupt handling. Target applications include factory automation and control, industrial control power devices, building and home automation, and brushless DC motors.
Product Features
32-bit ARM® Cortex™-M3 v7M architecture optimized for small-footprint embedded applications
Thumb®-compatible Thumb-2-only instruction set processor core for high code density
64 KB single-cycle flash with two forms of flash protection on a 2-KB block basis
8 KB single-cycle SRAM
Three timers, each of which can be configured: as a single 32-bit timer, as a dual 16-bit timer with capture and simple PWM modes, or to initiate an ADC event
Real-Time Clock (RTC) capability
32-bit down counter
Separate watchdog clock with an enable
Programmable interrupt generation logic with interrupt masking
Lock register protection from runaway software
Reset generation logic with an enable/disable Synchronous Serial Interface (SSI)
Programmable interface operation for Freescale SPI, National Semiconductor MICROWIRE™, or Texas Instruments synchronous serial
Master or slave operation
Two fully programmable 16C550-type UARTs
Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs to reduce CPU interrupt service loading