SEGGER J-Link Debug Probe is now supported by iSYSTEM winIDEA IDE

Hilden, Germany – June 11th, 2013

SEGGER today announces J-Link integration into the iSYSTEM winIDEA development environment. winIDEA and winIDEA Open are welcomed additions to the J-Link´s expansive list of supported IDEs, furthering its position as the industry standard debug probe.

winIDEA OPEN is free and designed for those developing on the Cortex-M platform. winIDEA OPEN has no code size limitation and takes full advantage of the extensive feature set of the J-Link product line. For instance the combination of the J-Link ULTRA+ and winIDEA OPEN offers download speeds of up to 3.0 MBytes/s, as well as unlimited breakpoints while debugging in flash memory. All JLink models further enhance the debug experience within winIDEA OPEN through its record breaking flash download technology. This technology achieves a performance very close to the maximum speed possible while fully maintaining the highest standards in reliability. The SEGGER flash loaders include a verification of each block written and final checksum verification to guarantee proper operation.

Utilizing the J-Link´s Unlimited Flash Breakpoint module permits any number of breakpoints to be set anywhere in program memory; including the target device´s, internal flash memory, external CFI-compliant flash, and internal or external RAM. Debugging limitations imposed by the number of hardware breakpoints available (typically between 4 and 6 onCortex-M devices) are completely eliminated. This presents a flash debugging environment which is virtually the same as that when debugging in RAM.

“SEGGER is excited to make available the professional J-Link debug probe solution to those interested in working with iSYSTEM´s free winIDEA OPEN. This makes a complete Cortex development solution very accessible”, says Dirk Akemann, Marketing Manager at SEGGER.

"The integration of SEGGER J-Link debuggers in winIDEA is part of iSYSTEM´s Cortex initiative 2013. As a result, we expect our development and test environment winIDEA/testIDEA, which is particularly popular in automotive industry at this time, to become even more popular around the world," says Erol Simsek, iSYSTEM CEO.

More details on the performance comparison can be found at:

About J-Link
The SEGGER J-Link is the most popular debug probe on the market. It is tool chain independent and works with commercial IDEs from: Atmel, Atollic, Coocox, Freescale, IAR, i-Systems, ImageCraft, KEIL, Mentor Graphics, Phyton, Rowley, Renesas, Tasking and others, as well as free GDB-based tool chains such as emIDE and EmBlocks. With the J-Link family, investments in the debug probe are likely preserved when changing compiler or even CPU architecture.

J-Link supports multiple CPU families, such as ARM 7, 9, 11, Cortex-M0, M0+, M1, M3, M4, R4, A5, A8, A9 as well as Renesas RX610, 620, 62N, 62T, 630, 631, 63N; there is typically no need to buy a new J-Link or new license when switching to a different CPU family or toolchain. SEGGER is also continuously adding support for additional cores, which in most cases, only requires a software/firmware update. Unlimited free updates are included with even the baseline model of the J-Link. SEGGER is excited to continue advanced development of its cutting edge embedded tool solutions to be utilized with pretty much any development environment you choose. All J-Links are fully compatible to each other, so an SEGGER Microcontroller – Solutions for embedded systems upgrade from a lower-end model to a higher-end model is a matter of a simple plug-andplay.

Full product specifications are available at:

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