It’s important to think about and plan for a power system at the outset of the design. As FPGAs continue to become increasingly powerful, adequately powering these devices becomes even more critical to unlock their full potential. Lower voltage requirements for FPGAs and processors create additional challenges, especially at higher currents, that require serious attention when designing the power architecture for a new platform.
New demands on embedded devices are pushing power capacities to their limits. Power optimizations are often left to the very end of the design cycle, almost as an afterthought. In this session we will explore design considerations that should be made early in the development process. View on-demand Web Seminar
Portable designs have long been hampered by the laws of supply and demand—an insufficient supply of energy and an excess of demand for it. Battery technology hasn’t progressed much since the advent of Li-Ion cells, and unless you’re comfortable with a thorium-based energy source there isn’t a lot of room for improvement.
On the demand side semiconductor engineers have made great strides over the last 10 years or so reducing power consumption. Moore’s Law has helped a great deal, but so have a host of other clever innovations including multiple clock and power domains, dynamic voltage and frequency scaling, power gating, and multiple sleep states. Today Renesas is well justified in referring to their RL78 and RX100 families of MCUs as “ultra-low-power.” More