It’s important to think about and plan for a power system at the outset of the design. As FPGAs continue to become increasingly powerful, adequately powering these devices becomes even more critical to unlock their full potential. Lower voltage requirements for FPGAs and processors create additional challenges, especially at higher currents, that require serious attention when designing the power architecture for a new platform.
New demands on embedded devices are pushing power capacities to their limits. Power optimizations are often left to the very end of the design cycle, almost as an afterthought. In this session we will explore design considerations that should be made early in the development process. View on-demand Web Seminar
Welcome to the Wizard of OS, a bi-weekly blog where we will pull back the curtain to share insights from a leading wizard in the embedded industry. The next 8 episodes will feature Bill Lamie of Express Logic in:
Back in the “old days,” around the time of the UNIVAC and CDC mainframes, embedded systems were emerging, mainly for military applications that required real-time operating systems (RTOS) or “executives.” These systems could respond to real-time events and handle other tasks in the background while waiting for the next event. These early RTOSes employed foreground/background architectures, where the background was controlled by a “Big Loop” type of sequential scheduler and the foreground was a glorified ISR.
The Big Loop Scheduler became a problem. As memory expanded and applications grew, the loop expanded and responsiveness declined. Multitasking offered a mixed mode of adjusted background scheduling, where real-time events could influence the scheduling of background tasks.
Multitasking proved to be a lot more efficient than the Big Loop, and became the backbone of all modern RTOS architecture and even multithreading hardware schedulers like those found in MIPS and Intel processors.
What does this have to do with today’s embedded systems? Check back in two weeks for some thoughts on that!. But, if you can’t wait, here is a link to the entire article. (PDF)
Portable designs have long been hampered by the laws of supply and demand—an insufficient supply of energy and an excess of demand for it. Battery technology hasn’t progressed much since the advent of Li-Ion cells, and unless you’re comfortable with a thorium-based energy source there isn’t a lot of room for improvement.
On the demand side semiconductor engineers have made great strides over the last 10 years or so reducing power consumption. Moore’s Law has helped a great deal, but so have a host of other clever innovations including multiple clock and power domains, dynamic voltage and frequency scaling, power gating, and multiple sleep states. Today Renesas is well justified in referring to their RL78 and RX100 families of MCUs as “ultra-low-power.” More