Analog Devices initial product family, the ADSP-BF531, and ADSP-BF532, offer all the ease of use and architectural attributes of the Blackfin processor. These three processors are all completely pin compatible - differing solely with respect to their performance and on-chip memory - thus reducing risk and offering the ability to scale up or down depending upon the end application needs. All three processors offer low power consumption with scaleable performance from low-cost to very high performance.
The ADSP-BF531 is the low cost entry point into the Blackfin Processor family. It offers an optimal balance between performance, peripheral integration, and price ($4.95 in quantities of 10Kpcs for LQFP version) and is well suited for the most cost-sensitive applications including portable test equipment, embedded modems, biometrics, and consumer audio.
High Level of Integration
52Kbytes of on-chip L1 memory configured as --
32Kbytes of L1 instruction memory SRAM/Cache
16Kbytes of L1 data memory SRAM/Cache
4 Kbytes of L1 scratchpad SRAM
Parallel Peripheral Interface supporting ITU-R 656 video data formats
Two dual-channel, full-duplex synchronous serial ports supporting eight stereo I2S channels
12 DMA channels supporting one and two-dimensional data transfers
Memory controller providing glueless connection to multiple banks of external SDRAM, SRAM, Flash, or ROM.
Three timer/counters supporting PWM, pulsewidth, and event count modes
UART with support for IrDA®
SPI-compatible port
Event handler
Real-time clock
Watchdog timer
PLL capable of 1x to 63x frequency multiplication
160-ball (12mm x 12mm) Mini-BGA, 176-Lead (24mm x 24mm) LQFP, and 169-ball (19mm x 19mm) Pb-Free Sparse PBGA packages
Industrial temperature range
The ADSP-BF532 offers exceptional performance, large on-chip memories, and an array of application-tuned peripherals. Its highly integrated feature set combined with an aggressive price ($7.50 in quantities of 10Kpcs) make it particularly well suited for applications requiring both a high degree of functionality and low cost such as automotive telematics, information appliances, and wired/wireless communications systems.
High Level of Integration
84Kbytes of on-chip L1 memory configured as --
48Kbytes of L1 instruction memory SRAM/Cache
32Kbytes of L1 data memory SRAM/Cache
4 Kbytes of L1 scratchpad SRAM
Parallel Peripheral Interface supporting ITU-R 656 video data formats
Two dual-channel, full-duplex synchronous serial ports supporting eight stereo I2S channels
12 DMA channels supporting one and two-dimensional data transfers
Memory controller providing glueless connection to multiple banks of external SDRAM, SRAM, Flash, or ROM.
Three timer/counters supporting PWM, pulsewidth, and event count modes
UART with support for IrDA®
SPI-compatible port
Event handler
Real-time clock
Watchdog timer
PLL capable of 1x to 63x frequency multiplication
160-ball (12mm x 12mm) Mini-BGA, 176-Lead (24mm x 24mm) LQFP, and 169-ball (19mm x 19mm) Pb-Free Sparse PBGA packages
Industrial temperature range
Features
Performance to 400MHz/800MMACs enables multi-channel audio plus CIF video processing in multimedia applications
Enhanced Dynamic Power Management with on-chip core voltage regulation allows operation to 0.8V extending battery life in portable applications
Application-tuned peripherals provide glueless connectivity to general purpose converters in data acquisition applications
Multiple low cost, pin- and code-compatible derivatives enable software differentiation in cost-sensitive consumer applications
