The H8S/2111B is a microcomputer (MCU) made up of the H8S/2000 CPU employing Renesas Technology´s original architecture as its core, and the peripheral functions required to configure a system.
The H8S/2000 CPU has an internal32-bit configuration, sixteen 16-bit general registers, and a simple and optimized instruction set for high-speed operation. The H8S/2000 CPU can handle a 16-Mbyte linear address space.
This LSI is equipped with ROM, RAM, a 16-bitfree-running timer (FRT), an 8-bit timer (TMR), a watchdog timer (WDT), a serial communication interface (SCI), a keyboard buffer controller, a host interface(LPC), an I2C bus interface (IIC), and I/O ports as on-chip peripheral modules, required for system configuration.
A flash memory version is available for this LSI´s ROM. This provides flexibility as it can be reprogrammed in no time to cope with all situations from the early stages of mass production to full-scale mass production. This is particularly applicable to application devices with specifications that will most probably change.
Note: There is no emulator tool which supports all functions of this device.
Key Features:
Operating frequency (MHz)/Supply voltage (V)
10MHz/3V
Standard instruction can be executed at 1state.
On-chip memory
ROM : 64kB Flash
RAM :2kB/ 3kB
Operating mode
Single-chip mode only
I/O Port(Input/Output)
114 pins
On-chip LPC interface.
Provides optimized versions of the peripheral functions of the H8S/2160Bgroup.
