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  PPC440GR Processors
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  Part number Family Manufacturer Core Variant Freq. Flash/ROM Package
 PPC440GR  PPC440  AMCC  PowerPC 440  667MHz  0  E-PBGA 456
  

General Description

With speeds of up to 667MHz,support for DDR memory, ethernet and NAND flash interfaces, low power dissipation and a small footprint, the PowerPC 440GR embedded processor is ideally suited to a wide range of high-performance applications, including networking and storage.The 440GR is an excellent choice for 405xx users requiring additional performance or looking to upgrade to DDR memory.

To enhance overall throughput, the PowerPC 440 superscalar core incorporates a 7-stage pipeline and executes up to two instructions per cycle. Its large 32KB data cache and 32KB instruction cache are 64-way set-associative. Versatile configurations enhance performance tuning while optional parity protection preserves data integrity. For additional system performance, the PowerPC 440 core includes dynamic branch prediction and 24 digital signal processing (DSP) instructions, as well as non-blocking caches that can be managed in either write-through or write-back mode.

Features

  • 333 to 667MHz
  • Nand Flash controller:
    • Supports 1 to 4 banks of Nand Flash memory devices
    • Direct interfacing to discrete Nand Flash devices (up to 4 devices) and SmartMedia Card socket (22-pins)
    • 4MB-256MB devices sizes supported
    • 512-byte +16-byte or 2KB +64-byte device page sizes supported
    • DMA support allows direct, no processor-intervention block copy from Nand Flash out to SDRAM
    • Boot-from-Nand supported
  • On-chip Double Data Rate (DDR) SDRAM controller with 32-bit interface, 13-bit addressing, 1.1 GBps peak data rate and optional ECC
  • Support for 4 banks DDR SDRAM memory of up to 256MB each, maximum capacity of 1GB
  • Support for 64, 128, 256, and 512MB DDR devices, with CAS latencies of 2,2.5,or 3
  • 32-bit PCI V2.2,3.3 V interface supporting frequencies of up to 66MHz
  • (2)Ethernet 10/100 Mbps, full duplex MAC (1xMII or 2xRMII)with packet reject interface support
  • Memory Access Layer (MAL) provides DMA capability to both Ethernet channels
  • Up to four serial port UARTs (1 x 8-pin, or 2 x 4-pin, or 4 x 2-pin, or 1x4-pin and 2 x 2-pin)
  • Two IIC (with one integrated Boot Strap Controller)
  • One SPI serial interface 4-channel DMA � available for internal and external use
  • Programmable interrupt controller with 10 external inputs, 64 internal inputs
  • Programmable timers
  • General-purpose I/O (64)
  • Support for JTAG board testing and RISCWatch� debugger
  • RoHS Compliant version available (lead-free)




 
AMCC 440GRx

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