Minimum instruction execution time can be changed from high speed (0.1 µs: @ 20 MHz operation with high speed system clock) to ultra low-speed (122 µs: @ 32.768 kHz operation with subsystem clock)
General-purpose register: 8 bits x 32 registers (8 bits x 8 registers x 4 banks)
Buffer RAM: 32 bytes (can be used for transfer in CSI with automatic transmit/receive function)
On-chip single-power-supply flash memory
Self-programming (with boot swap function)
On-chip debug function (µPD78F0547D and µPD78F0547DA only)
On-chip power-on-clear (POC) circuit and low-voltage detector (LVI)
On-chip multiplier/divider (16 bits x 16 bits, 32 bits/16 bits)
key interrupt function
clock output/buzzer output controller
I/O ports: 71 / N-ch open drain (6 V tolerance): 4
