The LPC1311/13/42/43 are ARM Cortex-M3 based microcontrollers for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration.
The LPC1311/13/42/43 operate at CPU frequencies of up to 70 MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching.
The peripheral complement of the LPC1311/13/42/43 includes up to 32 kB of flash memory, up to 8 kB of data memory, USB Device (LPC1342/43 only), one Fast mode plus I2C interface, one UART, four general purpose timers, and up to 42 general purpose I/O pins.

Main features

• ARM Cortex-M3 processor, running at frequencies of up to 70 MHz.
• ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
• 32 kB (LPC1343/13)/16 kB (LPC1342)/8 kB (LPC1311) on-chip flash programming memory. Enhanced flash memory accelerator enables high-speed 70 MHz operation with zero wait states.
• In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.
• Serial interfaces:
  • USB 2.0 full-speed device controller with on-chip PHY for device (LPC1342/43 only).
  • UART with fractional baud rate generation, modem, internal FIFO and RS-485/EIA-485 support.
  • SSP controller with FIFO and multi-protocol capabilities.
  • I2C-bus interface supporting full I2C-bus specification and Fast mode plus with a data rate of 1 Mbit/s with multiple address recognition and monitor mode.
• Other peripherals:
  • Up to 42 General Purpose I/O (GPIO) pins with configurable pull-up/down resistors and a new, configurable open-drain operating mode.
  • Four general purpose timers/counters, with a total of four capture inputs and 13 match outputs.
  • Programmable WatchDog Timer (WDT).
  • System tick timer.
  • Each peripheral has its own clock divider for power savings.
• Serial Wire Debug and Serial Wire Trace Port.
• High-current output driver (20 mA) on one pin.
• High-current sink drivers (20 mA) on two pins.
• Integrated PMU (Power Management Unit) to minimize power consumption during Sleep, Deep-sleep, and Deep power-down modes.
• Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
• Single 3.3 V power supply (2.0 V to 3.6 V).
• 10-bit ADC with input multiplexing among 8 pins.
• All GPIO pins can be used as edge and level sensitive interrupt sources.
• Clock output function with divider that can reflect the main oscillator clock, IRC clock, CPU clock, Watchdog clock, and the USB clock.
• Processor wake-up from Deep-sleep mode via interrupts from various peripherals.
• Brownout detect with four separate thresholds for interrupt and forced reset.
• Power-On Reset (POR).
• Crystal oscillator with an operating range of 1 MHz to 25 MHz.
• 12 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as a system clock.
• PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the main oscillator, the internal RC oscillator, or the Watchdog oscillator.
• Available as 48-pin LQFP package and 33-pin HVQFN package.