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Home » Renesas Electronics » H8S/2612

  H8S/2612 Processors
  List & Compare        
  Part number Family Manufacturer Core Variant Freq. Flash/ROM Package
 DF2612  H8S/2600  Renesas Electronics H8S/2000
 20MHz  131072  QFP80
  

Product Overview:

The H8S/2612 Series are single-chip microcomputers made up of the high-speed H8S/2600 CPU as its core, and the peripheral functions required to configure a system. The H8S/2600 CPU has an instruction set that is compatible with the H8/300 and H8/300H CPUs.
This LSI is equipped with a data transfer controller (DTC), ROM and RAM memory, a PC break controller (PBC), a 16-bit timer pulse unit (TPU), a motor management timer (MMT), a programmable pulse generator (PPG), a watchdog timer (WDT), a serial communication interface(SCI), a Hitachi controller area network (HCAN), an A/D converter, and I/O ports as on-chip peripheral modules required for system configuration.This LSI is suitable for use as an embedded microcomputer for high-level control systems. A single-power flash memory (F-ZTAT™) version is a vailable for this LSI's ROM. This provides flexibility as it can be reprogrammed in no time to cope with all situations from the early stages of mass production to full-scale mass production.
This is particularly applicable to application devices with specifications that will most probably change.

Key Features:

  • Operating frequency (MHz)/Supply voltage (V)
    • 20MHz/4.5 to 5.5V
      • High-speed operation: Basic instructions executed in one state
      • Minimum instruction execution time: 50ns(20MHz)
  • On-chip memory
    • 128kB/4kB
    • 64kB/4kB
  • Built-in multiplier:
    • 16bits x 16bits(four states)
  • HCAN x 1ch included
  • Multi-functional timer
    • TPU(16-bit Timer Pulse Unit) x 6ch
    • MMT(Motor Management Timer) x 6 phase output
  • SCI x 3ch included
  • A/D converter x 12ch included
  • Built-in clock multiplication PLL
  • Package (QFP-80)
    • FP-80Q

Key Applications:

FA Power source and Automotive Car Navigation

Built-in Functions

  • High-speed H8S/2000 central processing unit with 16-bit architecture
    • Upward-compatible with H8/300 and H8/300H CPUs on an object level
    • Sixteen 16-bit general registers
    • 69 basic instructions
    • Address space: 16M byte
  • Interrupt
    • Internal: 47
    • External: 7
  • Varioius peripheral functions
    • PC break controller x 2ch
    • Data transfer controller x 85ch
    • 16-bit timer-pulse unit (TPU) x 6ch
    • Motor management timer (MMT)
    • Programmable pulse generator (PPG) x 8ch
    • Watchdog timer x 1ch
    • Asynchronous or clocked synchronous serial communication interface (SCI) x 3ch
    • Controller area network (HCAN) x 1ch
    • 10-bit A/D converter x 12ch
    • Clock pulse generator
  • General I/O ports
    • I/O pins: 43
    • Input-only pins: 13