The Kinetis K60 MCU family includes IEEE 1588 Ethernet, full- and high-speed USB 2.0 On-The-Go with device charge detect capability, hardware encryption and tamper detection capabilities. Devices start from 256 KB of flash in 100LQFP packages extending up to 1 MB in a 256MAPBGA package with a rich suite of analog, communication, timing and control peripherals. High memory density K60 family devices include an optional single precision floating point unit, NAND flash controller and DRAM controller.
Key Features:
Ultra Low-Power
10 low-power modes with power and clock gating for optimal peripheral activity and recovery times. Stop currents of <500 nA, run currents of <200 μA/MHz, 4 μs wake-up from Stop mode
Full flash programming and analog peripheral operation down to 1.71V for extended battery life
Low-leakage wake-up unit with up to eight internal modules and sixteen pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes
Low-power timer for continual system operation in reduced power state
Flash, SRAM and FlexMemory
32 KB - 1 MB flash. Fast access, high reliability with 4-level security protection.
8 KB - 128 KB of SRAM
FlexMemory: 32 bytes - 16 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROMwith over 10M cycles and flash with 100 μsec write time (brownouts without data loss or corruption). No user orsystem intervention to complete programming and erase functions and full operation down to 1.71V. In addition,FlexNVM from 32 KB - 512 KB for extra program code, data or EEPROM backup.
Mixed-Signal Capability
Up to two high-speed 16-bit ADCs with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering
Up to two 12-bit DACs for analog waveform generation for audio applications
Up to three high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state
Up to two programmable gain amplifiers with x64 gain for small amplitude signal conversion
Accurate on-chip voltage reference eliminates need foraccurate external voltage reference IC reducing overall system cost
Performance
ARM Cortex-M4 core + DSP. 50 - 120 MHz, single cycle MAC, single instruction multiple data (SIMD) extensions, optional single precision floating point unit
Up to 32-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput
Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth
Up to 16 KB of instruction/data cache for optimized bus bandwidth and flash execution performance
Independent flash banks allowing concurrent code execution and firmware updating with no performance degradation or complex coding routines.
Timing and Control
Up to four FlexTimers with a total of 20 channels. Hardware dead-time insertion and quadrature decoding for motor control
Carrier modulator timer for infrared waveform generation in remote control applications
Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block
Human-Machine Interface
Xtrinsic low-power touch-sensing interface with up to 16 inputs. Operates in all low-power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick.
Connectivity and Communications
Up to six UARTs, with IrDA support including one UART with ISO7816 smart card support. Variety of data size, format and transmission/reception settings supported for multiple industrial communication protocols
Inter-IC Sound (I2S) serial interface for audio system interfacing
Up to two CAN modules for industrial network bridging
Up to three DSPI and two I2C
Reliability, Safety and Security
Memory protection unit provides memory protection for all masters on the cross bar switch, increasing software reliability
Cyclic redundancy check engine validates memory contents and communication data, increasing system reliability
Independent-clocked COP guards against clock skew or code runaway for fail-safe applications such as the IEC 60730 safety standard for household appliances
External watchdog monitor drives output pin to safe state external components if watchdog event occurs
External Peripheral Support
FlexBus external bus interface provides interface options to memories and peripherals such as graphics displays.Supports up to 6 chip selects.
Secure digital host controller supports SD, SDIO, MMC or CEATA cards for in-application software upgrades, media files or adding Wi-Fi support
NAND flash controller supports up to 32-bit ECC current and future NAND types. ECC management handled in hardware, minimizing software overhead.
