The ST7 family of HCMOS Microcontrollers has been designed and built around an industry standard 8-bit core and a library of peripheral blocks, which include ROM, EPROM, RAM, EEPROM, I/ O, Serial Interfaces (SPI, SCI, I2C,...), 16-bit Timers, etc. These blocks may be assembled in various combinations in order to provide cost-effective solutions for application dedicated products. The ST7 family forms part of the STMicroelectronics 8-bit MCU product line, and finds place in a wide variety of applications such as automotive systems, remote controls, video monitors, car radio and numerous other consumer, industrial, telecom, multimedia and automotive products.

ST7 ARCHITECTURE

The 8-bit ST7 Core is designed for high code efficiency. It contains 6 internal registers, 17 main addressing modes and 63 instructions. The 6 internal registers include 2 Index registers, an Accumulator, a 16-bit Program Counter, a Stack Pointer and a Condition Code register. The two Index registers X and Y enable Indexed Addressing modes with or without offset, along with read-modify- write type data manipulations. These registers simplify branching routines and data modifications. The 16-bit Program Counter is able to address up to 64K of ROM / EPROM memory. The 6-bit Stack Pointer provides access to a 64-level Stack and an upgrade to an 8-bit Stack Pointer is foreseen in order to be able to manage a 256-level Stack. The Core also includes a Condition Code Register providing 5 Condition Flags that indicate the result of the last instruction executed.

The 17 main Addressing modes, including Indirect Relative and Indexed addressing, allow sophisticated branching routines or CASE-type functions. The Indexed Indirect Addressing mode, for instance, permits look-up tables to be located anywhere in the address space, thus enabling very flexible programming and compact C-based code. The 63-instruction Instruction Set is 8-bit oriented with a 2-byte average instruction size. This Instruction Set offers, in addition to standard data movement and logic /arithmetic functions, byte multiplication, bit manipulation, data transfer between Stack and Accumulator (Push / Pop) with direct stack access, as well as data transfer using the X and Y registers.

Depending of the target device, different methods of Interrupt priority management may be selected: the number of Interrupt vectors can vary from 6 to 16, and the priority level may be managed by software on some versions. Some peripherals include Direct Memory Access (DMA) between serial interfaces and memory.

Power-saving may be managed under program control by placing the device in WAIT or HALT mode.

A high test coverage is achieved for ST 7 family devices thanks to the use of an autotest method based on "Cyclic Redundancy Checking" (CRC). This approach is based on the analysis of a data flow comprising not only input and output, but also internal data, which affords a detailed inside view of the behaviour of the core and of the peripherals.