V2 ColdFire Core: Single-Issue

The ColdFire2/2M is part of a semicustom, standard-cell based design program. High-volume manufacturers can create their own integrated microprocessor containing a core processor (such as the ColdFire2/2M) and their own proprietary technology. The resulting integrated processor allows significant reductions in component count, power consumption, board space, and cost, resulting in higher system reliability and performance. The ColdFire co-architecture was designed from the front ground up for exceptional integration capabilities by using 100% synthesized design, compiled memories, a hierarchial on-chip bus structure and industry-leading debug modules. This design methodology allows designers of high-volume digital systems and third-party technology providers to place their proprietary circuitry on-chip with a Freescale microprocessor core. Custom logic, memory, and peripheral modules can be added to a core processor to produce the most cost-effective solution for a designer's system.

The ColdFire2/2M has 32-bit address and data buses. The 32-bit address bus allows direct addressing of up to 4 Gbytes. A misalignment unit provides support for misaligned data accesses, and an optional bus arbitration unit provides support for additional bus masters.

A complete debug module is integrated into the ColdFire2/2M. This unit provides real-time trace, background debug mode, and real-time debug support. This includes a parallel processor status port, a subset of the background debug mode (BDM) functionality found on Freescale’s 683xx family of parts, and real-time trace and debug capability. This built-in debug support results in a standard debug interface to established tools for all standard and semi-custom ColdFire-based processors. The ColdFire2/2M also includes the control logic for an integrated instruction cache, SRAM, and ROM (up to of 32 Kbytes each.)

• 32-bit address bus which can directly address up to 4 Gbytes
• 32-bit data bus
• Variable-length RISC
• Optimized instruction set for high-level language constructs
• Sixteen general-purpose 32-bit data- and address- registers
Multiply Accumulate (MAC) unit for DSP applications (ColdFire2M only)
• Supervisor/user modes for system protection
• Vector-base register to relocate exception-vector table
• Special core interfacing signals for integrated memories
• Full debug support